ECS-M.2/FPGA

• Add EtherCAT SubDevice (ECS) functionality to your embedded PC
• The EtherCAT SubDevice Controller address space is directly mapped to the PCI Express address space
• M.2 form factor 2280 or 2260 for smaller embedded devices like IPCs or Raspberry Pi

• Easy configuration by esd's EtherCAT MainDevice or other MainDevices
• Sample EtherCAT SubDevice Information File (ESI file in XML format) is provided
• esd's EtherCAT SubDevice API library and sample code for rapid application development are included

• The FPGA contains Bus Master DMA support to offload the CPU from copying the output process image data into the host memory. This is utilized by the esd EtherCAT SubDevice Stack.

• Customized configurations are available on request

The ECS-M.2/FPGA is an EtherCAT SubDevice in M.2 form factor. It is based on a Beckhoff IP core implemented in an Altera® FPGA, configured with 8 FMMUs, 8 Sync Managers, 60 kB DPRAM, and 64-bit Distributed Clocks.
Two EtherCAT ports (IN/OUT) are available via FFC connectors on the board edge and can be connected to RJ45 sockets using the supplied breakout adapter.

The module supports standard EtherCAT protocols including CoE, FoE, and EoE, enabling the PCI Express host system to operate as a flexible EtherCAT I/O node accessible by the MainDevice.

For system synchronization, the EtherCAT Distributed Clock signals (2x Sync, 2x Latch I/Os) are provided as physical I/Os via breakout adapter.

The scope of delivery includes the esd EtherCAT SubDevice stack in binary form together with device drivers for Windows® and Linux®. Documentation and example applications are provided.
Support for additional operating systems, in particular real-time operating systems, is available on request.

This product is also available as PCI Express card ECS-PCIe/FPGA.
Variants for Compact PCI® Serial, XMC and PMC systems are offered as ECS-CPCIs/FPGA, ECS-XMC/FPGA and ECS-PMC/FPGA.