ECS-CPCIs/FPGA

• Extend your PC with EtherCAT Slave (ECS) functions.
• The memory area of the EtherCAT slave controller is directly mapped in the CompactPCI Serial address space.

• Easy configuration with the esd EtherCAT master or other EtherCAT masters
• Example of an EtherCAT Slave Information File (ESI file in XML format) included
• esd EtherCAT Slave API library and sample code for a quick start into application development are included in delivery

• The FPGA supports bus master DMA to relieve the CPU from copying the process image output data into the host memory. This function is used by the esd EtherCAT slave stack.

• 20 of the LVTTL I/Os can be configured as 10 I/Os with 2.5 V-level LVDS
• Further customized options available on request

ECS-CPCIs/FPGA is an EtherCAT slave controller board for the CompactPCI Serial Bus (CPCIs). The Beckhoff® IP core used is implemented in the Intel® FPGA and configured for 8 FMMUs, 8 sync managers, 60 kB DPRAM and 64 bit distributed clocks.
The FPGA connects the CompactPCI Serial bus with the two Ethernet interfaces, which are accessible via the front panel.

Due to the simple hardware topology and the use of a "soft" controller, the design offers maximum flexibility. The CompactPCI Serial system can act as an I/O node. An EtherCAT master can communicate with this EtherCAT slave device via different EtherCAT protocols, such as CoE, FoE and EoE.

Via the pin header assembled on the ECS-CPCIs/FPGA 36 I/Os with 3.3V LVTTL level are provided, including the signals from the EtherCAT slave controller: 2x Sync and 2x Latch for system synchronization.

Device drivers for Windows® and Linux® with documentation and EtherCAT Slave examples are included in the scope of delivery. Drivers for other operating systems, especially real-time operating systems, are available on request.