XMC/PMC Quad Core PowerPC™ CPU with FPGA

High-End CPU for Test and Application

  • Freescale™ PowerPC™ QorIQ P2041, 1.2 GHz, Double Precision Floating Point
    Unit, Ethernet, ECC-RAM

  • Xilinx® FPGA Spartan® 6 XC6LXT-45T for local applications

  • 2x Ethernet, 1x USB 2.0

  • 62 LVTTL I/Os at connector PMC-P14

Health Features and Fallback Flash

  • Local voltage and temperature monitoring

  • Fail save firmware update by means of fallback Flash

Wide Range of Software Support

  • VxWorks® and Linux® BSPs available

  • Example source code for the FPGA included in the BSPs

  • Universal boot loader: U-Boot

  • EtherCAT® master available

  • CAN IP-core available on request

XMC PowerPC Host CPU

The XMC-CPU/2041 is equipped with a PMC and an XMC interface. The powerful Freescale PowerPC QorIQ P2041 with 1.2 GHz is built on Power Architecture® technology, bringing high-end architectural features pioneered in the P4 platform into the mid range quad core space. The local memory bus is 64 bits wide plus 8 bits ECC with an overall capacity of 512 Mbyte. 16 Mbyte SPI Flash for boot loader and 32 Kbit I²C EEPROM for U-Boot environment offer non-volatile memory spaces.
The XMC-CPU/2041 is equipped with a second 16 Mbyte 'fallback' SPI Flash that is used for system recovery, if a system crash occurs during a firmware update.

FPGA for Local Applications

The Xilinx FPGA Spartan 6 is connected to the CPU by local bus for low latency data exchange. For high bandwidth data exchange the FPGA is additionally connected via PCI Express to the CPU. 62 LVTTL-I/Os of the FPGA are routed to the PMC-P14 connector.
The connected DDR3 RAM could be used for shared memory applications for example.

XMC/PMC Interfaces

The XMC interface comes with 4-lane PCIe bus and is designed according to VITA 42.3. The PMC interface supports 32 bit / 66 MHz PCI bus according to PCI Local Bus Specification 3.0.

Gigabit Ethernet

The XMC-CPU/2041 is equipped with two Gigabit Ethernet interfaces accessible at the front panel, which give an excellent base for EtherCAT applications.


The USB host port supports USB 2.0.

Software Support

The Flash memory carries the standard boot program U-Boot and enables the XMC-CPU/2041 to boot various operating systems from network or on-board Flash.
BSPs are available for VxWorks and Linux. Example source code for the FPGA is included in the BSPs. The esd EtherCAT master is available and is implemented for VxWorks.
A CAN IP-core (esdACC) is available on request, implemented in a customized configuration (number of CAN nodes, routing FPGA ↔ P14).

XMC/PMC-Quad-Core-PowerPC-CPU mit FPGA von esd