CAN Error Injection
A Simple but Versatile Approach
Nowadays, CAN buses are standard building blocks, not only in automotive area and industrial automation, but to an increasing degree in safety sensitive areas, including medical environments, aircraft industry and even in space. With the elevated safety requirements there's a rising need for verification, simulation and testing.
In general, CAN controllers available on the market are unable to generate CAN traffic containing errors or violating CAN ISO 11898 standard. This paper describes a simple and effective approach using flexible FPGA technology to inject errors into CAN buses. Adding rather small error injection units to a CAN controller within an FPGA provides means to not only generate all kinds of errors on CAN bus, but also to interact with and modify ongoing CAN traffic, at the cost of little more than standard CAN hardware.
Error injection units feature several injection modes, such as CAN arbitration, time triggered or pattern matching, and can be combined to accommodate more complex scenarios.
esd offers an esdACC Error Injection GUI Tool for free to control the error injection units. The manual of the tool can be downloaded by registered users: esdACC Error Injection GUI Tool Manual (.pdf)
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CAN-PCI/400 |
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2 or 4 Channel PCI-CAN Interface with esdACC (Layer 2, CANopen®, J1939 or ARINC825)
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CAN-PCIe/400 |
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2 or 4 Channel PCI Express® CAN Interface Board with esdACC (Layer 2, CANopen®, J1939 or ARINC825)
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CAN-USB/400 |
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2x CAN (Layer 2, CANopen®, J1939 or ARINC 825)
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CAN-USB/400-IRIG-B |
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2x CAN (Layer 2, CANopen®, J1939 or ARINC 825, IRIG-B Input)
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PMC-CAN/400-4 |
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4x CAN: Layer 2, CANopen®, J1939 or ARINC 825, optional IRIG-B
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