2x CAN (Layer 2, CANopen®, J1939 or ARINC 825) with Bus Master DMA
2 High-Speed CAN Interfaces for CompactPCI® with Bus Master DMA
CAN interfaces according to ISO 11898-2 with electrical isolation
Capable of 100% CAN bus load
Reduces system load by bus master DMA transfer
Enhanced diagnostic features e.g. CAN Error Injection
33/66 MHz CompactPCI interface
Realtime OS Drivers, J1939 and ARINC 825 Higher Layer Protocol Support
Drivers and higher layer protocols for Windows®, Linux®, VxWorks®, QNX®, RTX On Time RTOS-32 and others
CANopen, J1939 and ARINC 825 protocol available
CAN is driven by well proven esd Advanced CAN Core (esdACC) CAN controller
Hardware Option PXI-Interface
CPCI CAN Interface
The CPCI-CAN/400-2 is a CompactPCI board in 3U format, that features two electrically isolated CAN High-Speed interfaces according to ISO 11898-2. CAN is driven by the esd Advanced CAN Core (esdACC) CAN controller implemented in the Xilinx Spartan 3e FPGA. The CPCI-CAN/400-2 provides high resolution hardware timestamps.
Operating system independent CAN layer 2 API (NTCAN).
Multiple Higher Level Protocols available
• CANopen Master- and Slave-Stack
• J1939 (Windows only)
Options PXI and :C
The CPCI-CAN/400-2 optionally features a PXI interface:
The signals TRG 0-7, CLK 10 and STAR are controlled via the FPGA. The signals LBL/LBR1-12 are looped through.
An optional 32-bit MicroBlaze :C is available in the FPGA. Please, contact our sales team (firstname.lastname@example.org) for further information.